Gate Electrode Technologies for Sub-100nm CMOS Devices - SiGe and Metal Gate

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Bibliographische Detailangaben
Veröffentlicht in:	Handōtai-Shūseki-Kairo-Gijutsu-Shinpojiumu (60 : 2001 : Osaka) Handōtai, Shuseki-Kairo-Gijutsu-60.-Shinpojiumu-kōen-ronbunshū
1. Verfasser:	Yamamoto, T. (VerfasserIn)
Weitere Verfasser:	Uejima, K. (VerfasserIn), Wakabayashi, H. (VerfasserIn), Saito, Y. (VerfasserIn), Takeuchi, K. (VerfasserIn), Mogami, T. (VerfasserIn)
Pages:	60
Format:	UnknownFormat
Sprache:	jpn
Veröffentlicht:	2001
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Titel	Jahr	Verfasser
Rutile-Type TiO2 Films for High-K Gate Insulator	2001	Kadoshima, M.
High K Gate Dielectric Technology	2001	Iwai, H.
Application of SiO2 — Nanocrystal Thin Films to Low-K Dielectrics	2001	Kihara, T.
Fabrication of Ni Nanostructure on Silicon Wafer by Electroless Deposition	2001	Niwa, D.
HfO2 Film Deposition by MOCVD	2001	Hoshino, A.
Porous SOG Films for Ultra Low-K Appplication	2001	Murakami, H.
Electronic Properties of Si(100)/SiO2 Interface	2001	Kaneta, C.
SiON Gate Insulators for Sub-100nm CMOS - Film Properties and Device Characteristics	2001	Toyoshima, Y.
Evaluation and Analysis for Mechanical Strengths of Low-K Dielectrics	2001	Aoi, N.
Overview of Current Status of Cu CVD Technology and Its Future Prospect	2001	Awaya, N.
Application of Copper Plating Technologies for LSI Circuits	2001	Nawafune, H.
Process Design for Dual-Damascene Copper Interconnects with High Reliability	2001	Oshima, T.
Preparation and Characterization of High-K Gate Dielectric Films by Reactive Sputtering	2001	Hayashi, S.
High-K Capacitor Technology for High Density DRAMs	2001	Hieda, K.
Gate Electrode Technologies for Sub-100nm CMOS Devices - SiGe and Metal Gate	2001	Yamamoto, T.
Formation of Porous Silica Films from SiO2 Hybrid Materials Deposited by CVD	2001	Fujimoto, A.
A Novel Compact ECD Tool for Cu Metallization	2001	Tsujimura, M.