Handōtai, Shuseki-Kairo-Gijutsu-70.-Shinpojiumu-kōen-ronbunshū Tōkyō, July 6 - 7, 2006

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Bibliographische Detailangaben
Körperschaft:	Denki Kagaku Kyōkai (BerichterstatterIn)
Format:	UnknownFormat
Sprache:	jpn
Veröffentlicht:	Tokyo 2006
Schlagworte:	Konferenzschrift > Japan > Halbleiterschaltung > Integrierte Schaltung
Online Zugang:	Inhaltsverzeichnis
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Titel	Jahr	Verfasser
Vth-Tunable CMIS Platform with High-k Gate Dielectrices and Variability Effect for 45nm Node	2006	Hayashi, T.
New Stress Inducing Technique of Epitaxial Si on Recessed S/D Fabricated in Substrate Strained-Si of <100>-Channel on Rotated Wafers	2006	Sanuki, T.
Development of CMP Process for Cu / Porous Low-k Interconnect Fabrications	2006	Nishioka, T.
Nano-Scale Evaluations for Degradation Phenomena in Gate Insulators Using Conductive-AFM	2006	Zaima, S.
A Study of TiN Metal Gate Electrodes Formed by Divided CVD Technique for p-MISFETs	2006	Sakashita, S.
Fusion of Semiconductor and MEMS	2006	Okumura, K.
Polymer Abrasive Slurry for Cu-CMP	2006	Nakamura, S.
Critical Issues of HfSiON Hight-k Gate Insulator for CMOS Application	2006	Koyama, M.
Work Function Control of HfN Gate Electrode	2006	Kurahashi, T.
Tsukuba Semiconductor Consortium	2006	Watanabe, H.
Analysis of Nano-Scale CMOS Device with TCAD Simulation	2006	Tanabe, R.
Advanced LSI BEOL Module Technology for Ubiquitous Applications	2006	Hayashi, Y.
Fracture Property Improvements of Porous Low-k Dielectrics	2006	Kokubo, T.
Comparison between UV and EB Cure Method for Porous PAr / Porous MSX Hybrid Structure	2006	Shimada, M.
A Highly Reliable Barrier Formation Process for Advanced LSI Multilayer Interconnect	2006	Koike, J.
Stress Migration Phenomena in Cu/Low-k Interconnects	2006	Nakamura, T.
Plasma Doping	2006	Mizuno, B.