High Performance Cu Dual-damascene Interconnects with Ultra Low-k Porous-SiOC and Selective Barrier Layer CuSiN for 32nm-node

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Veröffentlicht in:Handōtai, Shuseki-Kairo-Gijutsu-71.-Shinpojiumu-kōen-ronbunshū
1. Verfasser: Hayashi, Y. (VerfasserIn)
Weitere Verfasser: Tsumura, K. (VerfasserIn), Shimada, M. (VerfasserIn), Watanabe, K. (VerfasserIn), Miyajima, H. (VerfasserIn), Usui, T. (VerfasserIn), Shibata, H. (VerfasserIn)
Pages:71
Format: UnknownFormat
Sprache:eng
Veröffentlicht: 2007
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