Pushing the limits in packaging design and manufacturing Semiconductor Packaging Technology Symposium 2014 : Santa Clara, California, USA, 23 October 2014

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Bibliographische Detailangaben
Körperschaften:	MEPTEC Semiconductor Packaging Technology Symposium (VerfasserIn), MicroElectronics Packaging and Test Engineering Council (Herausgebendes Organ)
Format:	UnknownFormat
Sprache:	eng
Veröffentlicht:	Red Hook, NY Curran Associates, Inc. 2020
Schriftenreihe:	MEPTEC symposium proceedings number 58
Schlagworte:	Konferenzschrift > Halbleitertechnologie > Halbleitergehäuse
Online Zugang:	Inhaltsverzeichnis
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Titel	Jahr	Verfasser
Supply Chain Benchmarking Now Focused on Packaging	2020	Meyuhas, Ariel
Optimize Product Cost and Performance with System-level 3D Chip, Package, Board Co-Design	2020	Church, James
An IDM’s Integration and Partnership with the OSAT Supply Chain	2020	Gandenberger, James G.
KEYNOTE - Transforming Electronic Interconnect	2020	Olson, Tim
Advanced Packaging’s Interconnect Technology Process Shift and Direction	2020	Hayes, Jay
The Future of Packaging - The Relevance of Wire Bonding	2020	Qin, Ivy
Morphing the Semiconductor Outsourcing’s Business Model: Wafer Level Packaging	2020	Walker, Jim
Considerations in High-Speed High Performance Die-Package-Board Co-Design	2020	Jiang, Jenny
Will IoT (Internet of Things) Drive 2.5/3D IC Revenue Growth and Change Our Lives?	2020	Reiter, Herb
Silver Sintering for Power Electronics	2020	England, Jenny Jiong
MCM Package Development for In-Vehicle Infotainment Systems	2020	Kang, Terry
Advances in Medical Device Package Manufacturing	2020	Binkley, Edward
Challenges of Building RF Multi-chip Modules	2020	Juskey, Frank
Thermal Management in High-Performance Integrated 3D TSV Logic/Memory Systems	2020	Gregorich, Tom