SideLine: How Delay-Lines (May) Leak Secrets from Your SoC

Gespeichert in:

Bibliographische Detailangaben
Veröffentlicht in:	COSADE (12. : 2021 : Lugano, Online) Constructive Side-Channel Analysis and Secure Design
1. Verfasser:	Gravellier, Joseph (VerfasserIn)
Weitere Verfasser:	Dutertre, Jean-Max (VerfasserIn), Teglia, Yannick (VerfasserIn), Moundi, Philippe Loubet (VerfasserIn)
Format:	UnknownFormat
Sprache:	eng
Veröffentlicht:	2021
Schlagworte:
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!

Titel	Jahr	Verfasser
First Full-Fledged Side Channel Attack on HMAC-SHA-2	2021	Belenky, Yaacov
Learning When to Stop: A Mutual Information Approach to Prevent Overfitting in Profiled Side-Channel Analysis	2021	Perin, Guilherme
Transform Without Encode is not Sufficient for SIFA and FTA Security: A Case Study	2021	Saha, Sayandeep
Generalizing Statistical Ineffective Fault Attacks in the Spirit of Side-Channel Attacks	2021	Barbu, Guillaume
White-Box ECDSA: Challenges and Existing Solutions	2021	Dottax, Emmanuelle
On Using RSA/ECC Coprocessor for Ideal Lattice-Based Key Exchange	2021	Greuet, Aurélien
Full Key Recovery Side-Channel Attack Against Ephemeral SIKE on the Cortex-M4	2021	Genêt, Aymeric
Analysis and Protection of the Two-Metric Helper Data Scheme	2021	Tebelmann, Lars
SideLine: How Delay-Lines (May) Leak Secrets from Your SoC	2021	Gravellier, Joseph
Low-Latency Hardware Masking of PRINCE	2021	Müller, Nicolai
Protecting Secure ICs Against Side-Channel Attacks by Identifying and Quantifying Potential EM and Leakage Hotspots at Simulation Stage	2021	Poggi, Davide
Security Analysis of Deterministic Re-keying with Masking and Shuffling: Application to ISAP	2021	Udvarhelyi, Balazs
Resistance of Isogeny-Based Cryptographic Implementations to a Fault Attack	2021	Tasso, Élise
Enhancing the Resiliency of Multi-bit Parallel Arbiter-PUF and Its Derivatives Against Power Attacks	2021	Kroeger, Trevor