High-Performance CMOS Device Technologies Featuring Metal/High-k Gate Electrodes with Uniaxially-Strained Silicon Channels on (100) and (110) Substrates

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Veröffentlicht in:Handōtai, Shuseki-Kairo-Gijutsu-71.-Shinpojiumu-kōen-ronbunshū
1. Verfasser: Wakabayashi, H. (VerfasserIn)
Weitere Verfasser: Tateshita, Y. (VerfasserIn), Wang, J. (VerfasserIn), Nagano, K. (VerfasserIn), Hirano, T. (VerfasserIn), Miyanami, Y. (VerfasserIn), Ikuta, T. (VerfasserIn), Kataoka, T. (VerfasserIn), Kikuchi, Y. (VerfasserIn), Yamaguchi, S. (VerfasserIn), Ando, T. (VerfasserIn), Tai, K. (VerfasserIn), Matsumoto, R. (VerfasserIn), Fujita, S. (VerfasserIn), Yamane, C. (VerfasserIn), Yamamoto, R. (VerfasserIn), Kanda, S. (VerfasserIn), Kugimiya, K. (VerfasserIn), Kimura, T. (VerfasserIn), Ohchi, T. (VerfasserIn), Yamamoto, Y. (VerfasserIn), Nagahama, Y. (VerfasserIn), Hagimoto, Y. (VerfasserIn), Tagawa, Y. (VerfasserIn), Tsukamoto, M. (VerfasserIn), Iwamoto, H. (VerfasserIn), Saito, M. (VerfasserIn), Kadomura, S. (VerfasserIn), Nagashima, N. (VerfasserIn)
Pages:71
Format: UnknownFormat
Sprache:eng
Veröffentlicht: 2007
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