Asynchronous on-chip networks and fault-tolerant techniques
"This book is the first comprehensive study of fault-tolerance and fault-caused deadlock effects in asynchronous on-chip networks, aiming to overcome these drawbacks and ensure greater reliability of applications. As a promising alternative to the widely used synchronous on-chip networks for mu...
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| Format: | UnknownFormat |
| Sprache: | eng |
| Veröffentlicht: |
Boca Raton, London, New York
CRC Press, Taylor & Francis Group
2022
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| Ausgabe: | First edition |
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| Online Zugang: | Inhaltsverzeichnis |
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Tag hinzufügen | Zusammenfassung: | "This book is the first comprehensive study of fault-tolerance and fault-caused deadlock effects in asynchronous on-chip networks, aiming to overcome these drawbacks and ensure greater reliability of applications. As a promising alternative to the widely used synchronous on-chip networks for multicore processors, asynchronous on-chip networks can be vulnerable to faults even if they can deliver the same performance with much lower energy and area compared with their synchronous counterparts. Faults can not only corrupt data transmission but also cause a unique type of deadlock. By adopting a new redundant code along with a dynamic fault detection and recovery scheme, the authors demonstrate that asynchronous on-chip networks can be efficiently hardened to tolerate both transient and permanent faults and overcome fault-caused deadlocks. This book will serve as an essential guide for researchers and students studying interconnection networks, fault tolerant computing, asynchronous system design, circuit design and on-chip networking, as well as for professionals interested in designing fault-tolerant and high-throughput asynchronous circuits"-- |
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| Beschreibung: | Literaturverzeichnis: Seite 329-362 |
| Beschreibung: | xvii, 362 Seiten Diagramme |
| ISBN: | 9781032255750 978-1-032-25575-0 9781003284789 978-1-003-28478-9 |