Impulse Responses of On-chip Power Supply Networks with Varying Conditions

von Uematsu, Yutaka
Veröffentlicht in 2010 IEEE CPMT Symposium Japan (2010)

Power Efficient Data Rate for Photonic Interposer

von Chujo, Norio
Veröffentlicht in 2014 IEEE CPMT Symposium Japan (ICSJ 2014) (2014)

Dependability in electronic systems : mitigation of hardware failures, soft errors, and electro-magnetic disturbances

von Kanekawa, Nobuyasu
Veröffentlicht 2011

Study of the insertion loss of a differential pair of through holes for the 25Gbps serial interconnect

von Shinkai, Go
Veröffentlicht in 2012 2nd IEEE CPMT Symposium Japan (2012)

Power distribution network design method based on frequency-dependent target impedance for jitter design of memory interface

von Ikeda, Yasuhiro
Veröffentlicht in 2013 IEEE CPMT Symposium Japan (formerly VLSI Packaging Workshop of Japan) (2013)