A Photoelastic coating analysis of the effects of Mechanical Properties of Costituent Metallic Materials and Specimen forms in the Stress- and Strain-Concentration at the area Yiel...

von Kawata, K.
Veröffentlicht in Nihon Kōdansei Gakkai (10. : 1988 : Tokio) Nihon Kōdansei Gakkai Dai 10kai Kenkyū Happyō Kōenkai kōen ronbunshū (1988)

Photoelastic coating analysis of the behaviour of notched plate after local yielding

von Kawata, K.
Veröffentlicht in Nihon Kōdansei Gakkai (8. : 1986 : Tokio) Nihon Kōdansei Gakkai Dai 8kai Kenkyū Happyō Kōenkai kōen ronbunshū (1982)

Photoelastic Coating Analysis of Stress and Strain Concentration at The Bottomof The Notch after Local Yielding

von Kawata, K.
Veröffentlicht in Nihon Kōdansei Gakkai (9. : 1987 : Tokio) Nihon Kōdansei Gakkai Dai 9kai Kenkyū Happyō Kōenkai kōen ronbunshū (1987)

Towards Si-Cap-Free SiGe Passivation: Impact of Surface Preparation on Low-Pressure Oxidation of SiGe

von Wostyn, K.
Veröffentlicht in International Symposium on Ultra Clean Processing of Semiconductor Surfaces (15. : 2021 : Mecheln) Ultra clean processing of semiconductor surfaces XV (2021)

(Invited) Si-Cap-Free Low-Dir SiGe Gate Stack for High-Performance pFETs

von Arimura, H.
Veröffentlicht in Pacific Rim Meeting on Electrochemical and Solid State Science (2020 : Online) (9.) SiGe, Ge, and Related Compounds: Materials, Processing, and Devices 9 (2020)

Cutting-Edge Epitaxial Processes for Sub 3 Nm Technology Nodes: Application to Nanosheet Stacks and Epitaxial Wrap-Around Contacts

von Hikavyy, A. Y.
Veröffentlicht in Symposium on Semiconductor Process Integration (12. : 2021 : Online) Semiconductor Process Integration 12 (2021)

Contact Resistivity of Highly Doped Si:P, Si:As, and Si:P:As Epi Layers for Source/Drain Epitaxy

von Rosseel, E.
Veröffentlicht in Pacific Rim Meeting on Electrochemical and Solid State Science (2020 : Online) (9.) SiGe, Ge, and Related Compounds: Materials, Processing, and Devices 9 (2020)

Gate-All-Around Nanowire & Nanosheet FETs for Advanced, Ultra- Scaled Technologies

von Veloso, A.
Veröffentlicht in ECS Meeting (237. : 2020 : Montréal) (19.) Advanced CMOS-Compatible Semiconductor Devices 19 (2020)

(Invited) Stress Simulations of Fins, Wires, and Nanosheets

von Eneman, G.
Veröffentlicht in Pacific Rim Meeting on Electrochemical and Solid State Science (2020 : Online) (9.) SiGe, Ge, and Related Compounds: Materials, Processing, and Devices 9 (2020)

Challenges and Solutions of Replacement Metal Gate Patterning to Enable Gate-all-Around Device Scaling

von Oniki, Y.
Veröffentlicht in International Symposium on Ultra Clean Processing of Semiconductor Surfaces (15. : 2021 : Mecheln) Ultra clean processing of semiconductor surfaces XV (2021)